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# How MCUs can extend ADC resolution/accuracy

Posted: 26 Mar 2010     Print Version

When considering the resolution required for an ADC integrated in an MCU, embedded systems designers must balance cost and performance. Higher ADC resolution implies higher-cost MCUs. But in some cases, you can use other features in the MCU to enhance the ADC performance via software. That approach lets you achieve higher resolution using an inexpensive integrated ADC. Here's how to use oversampling to achieve extra bits of resolution for an ADC integrated in an MCU.

We start by examining the frequency-domain transfer function of a multibit ADC operating on a sinewave input signal. The ADC samples this input at a frequency Fs, which (according to Nyquist theory) must be at least twice the input-signal bandwidth. An FFT analysis (left graph of Figure 1) shows a single tone with lots of random noise (known as quantization noise) extending from DC to Fs/2.

 Figure 1: An FFT analysis of the sampled signal shows a single tone and lots of random noise in the frequency range DC to Fs/2, for both the frequency domain and oversampling cases.

You obtain the signal-to-noise ratio (SNR) by dividing the amplitude of the fundamental by the RMS sum of all frequencies containing noise. For an N-bit ADC whose peak input voltage equals the ADC's full-scale input voltage, the maximum SNR equals 6.02N + 1.76dB.

Consider now the same example, but with sampling frequency increased by an oversampling ratio of k, in other words, to kFs. An FFT analysis shows that the noise floor has fallen and the SNR is the same, but noise energy has been spread over a wider frequency range (right graph of Figure 1).

 Figure 2: Decimation doesn�t cause loss of information.

For inputs sampled at Fs, the rate for filtered output data can be reduced to Fs/M without loss of information, using a "decimation" process (Figure 2). M can have any integer value, on condition that the output data rate is more than twice the signal bandwidth. Oversampling and averaging increases the SNR, which is equivalent to gaining additional bits of resolution. For each such additional bit, the signal must be oversampled by a factor of four:

fos = 4wFs, where

w is the number of additional bits of resolution desired, Fs is the original sampling frequency required, and fos is the oversampling frequency. As an example, a 12-bit ADC can achieve:
� 13-bit resolution with 4x oversampling (41),
� 14-bit resolution with 16x oversampling (42),
� 15-bit resolution with 64x oversampling (43),
� 16-bit resolution with 256x oversampling (44).

If we oversample an input signal at 16Fs, we collect enough samples within the required sampling period to average and produce 14 bits of output data, for a 14-bit measurement. This is accomplished by accumulating 16 consecutive samples and dividing the total by 16, as Figure 3 shows.

 Figure 3: The analogue signal (far left) is sampled and converted by the 12bit ADC. The values are then accumulated and averaged to deliver a 14bit result.

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