Global Sources
EE Times-India
EE Times-India > EDA/IP

PLD architecture trades off time with circuit density

Posted: 03 Mar 2010     Print Version  Bookmark and Share

Keywords:3D  PLD  FPGAs 

Steve Teig

Teig: I asked myself what if there was a new class of programmable device beyond FPGA.

Tabula Inc., a privately held fabless semiconductor start-up company founded Nov. 2003, recently came out of "stealth mode" with the introduction Mar. 1, 2010, of Spacetime, a novel programmable logic architecture that uses time as a third dimension to deliver capability and affordability unmatched by traditional FPGA and CPLD architectures.

Tabula has raised about $106 million (Rs.489.48 crore) in venture capital and has 100 employees. Its staff includes veterans in the electronics industry such as Dennis Segers, CEO, who spent more than 10 years at Xilinx where he spearheaded the development and market entry of Virtex; Steve Teig, founder, president and CTO, who comes from Cadence and is considered the inventor of modern place-and-route technology; and Daniel Gitlin, VP, manufacturing technology, who spent about 18 years at Xilinx and is responsible for Tabula gaining access to TSMC's 40nm technology in Sept. 2007 during the early days of that node.

Spacetime advantages

Figure 1: Tabula claims its architecture delivers significant performance and logic density advantages over traditional FPGAs.

When at Cadence, Teig realised his customers were grappling with the expense of programmable devices or the expense and effort that goes into developing ASICs. It was here that he incubated the idea of Spacetime.

"As CTO of Cadence, I frequently observed just how expensive, time-consuming, and risky ASIC and ASSP tape-outs were becoming," said Teig. "I asked myself what if there was a new class of programmable device beyond FPGA: one with unprecedented capacity, memory, throughput, and performance at a price suitable for volume production. Such a device could displace not only FPGAs but also the vast majority of ASICs and ASSPs, finally delivering on the promise of programmable devices to change the whole digital logic landscape and not just a corner of it. After much effort, I realised that I could see how to build such a device, one that could help not only large companies but also two guys in a garage to design hardware quickly and inexpensively, getting into volume production without having to abandon programmability. I had to start a company."

The Spacetime concept
The Spacetime technology uses time as a third dimension in programmable logic while maintaining a familiar design flow. Tabula calls the result a new class of programmable devices called 3PLDs (from 3D programmable logic devices), which they claim will deliver higher performance than traditional 40nm FPGAs.

1 • 2 Next Page Last Page

Comment on "PLD architecture trades off time wit..."
*  You can enter [0] more charecters.
*Verify code:


Visit Asia Webinars to learn about the latest in technology and get practical design tips.


Go to top             Connect on Facebook      Follow us on Twitter      Follow us on Orkut

Back to Top