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EE Times-India > EDA/IP

Open-Silicon, Virage team on low-power silicon

Posted: 23 Feb 2010     Print Version  Bookmark and Share

Keywords:design solution  intellectual property  interface 

Open-Silicon Inc. and Virage Logic are partnering to provide comprehensive design solutions including access to Virage's extensive physical and advanced interface intellectual property (IP) portfolio. In particular, as more and more customers develop energy-efficient devices, Virage's low-power IP combined with Open-Silicon's lower-power design technology enable the development of significantly lower-power silicon.

"This partnership underscores our continued commitment to meet our customers' needs for lower power, managed variability, and faster time-to-market," said Naveed Sherwani, CEO and president of Open-Silicon. "We selected Virage Logic as our trusted IP partner because of their proven track record in providing a broad portfolio of highly differentiated IP. This offering, paired with Open-Silicon's OpenMODEL proven integration capability, allows customers to achieve very high levels of performance while reducing overall system power."

The partnership presents a well-aligned technology offering. Virage Logic uses several advanced power management features within the SiWare Memory compilers and SiWare Logic libraries that enable customers to dramatically reduce leakage current while maximising performance. Open-Silicon's VariMAX back biasing technology similarly works with Virage Logic's tapless SiWare Logic standard cell libraries to reduce leakage for the IC's logic. By changing the amount of bias used on individual chips, VariMAX effectively tunes the silicon for optimum power and thereby boosts production yields. This latest collaboration builds on a recently announced co-developed test chip with working silicon running at 1.1GHz that was achieved using Open-Silicon's patented CoreMAX performance enhancement technology and Virage Logic's advanced SiWare Memory compilers.

"As power management and efficiency are becoming increasingly critical in a multiplicity of products and technologies, our collaboration with Open-Silicon underscores how we are working with our design ecosystem partners to help SoC designers address these challenges," said Alex Shubat, president and CEO of Virage. "Open-Silicon's MAX Technologies working in conjunction with Virage Logic's extensive semiconductor IP portfolio enables our mutual customers to address a broad range of SoC design requirements."

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