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Memory/Storage  

PowerQUICC and QorIQ DDR3 SDRAM controller register setting considerations

Posted: 17 Feb 2010     Print Version  Bookmark and Share

Keywords:PowerQUICC QorIQ  DDR SDRAM controller  register considerations 

This application note expands on the description of the DDR3 memory controller programmable registers in the PowerQUICC and QorIQ processor reference manuals. The applicable device reference manual defines the function of each field in the programmable registers. This application note focuses on why and when to select certain configurations of the register bits and fields to achieve efficient DDR programming.

View the PDF document for more information.





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