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IM Flash takes NAND lead with 25nm ICs

Posted: 02 Feb 2010     Print Version  Bookmark and Share

Keywords:NAND flash  Intel Micron lead  25nm chip 

Intel Corp. and Micron Technology Inc. have regained the process technology lead in NAND flash by rolling out 25nm devices.

The first 25nm NAND device is a multi-level-cell (MLC), 8GB device, which is said to reduce IC count by 50 per cent over previous products. With the device, measuring 167mm², the Intel-Micron duo will retake the NAND process lead over the SanDisk-Toshiba duo and Samsung Electronics Co. Ltd, which have recently announced 32nm and 30nm products, respectively. Another player, Hynix Semiconductor Inc., has a 26nm device waiting in the wings.

The 25nm product announcement was supposedly embargoed for Feb. 1, but one analyst leaked the details Jan. 29.

The 25nm device is made at IM Flash Technologies LLC, a joint NAND fab venture between Intel and Micron. Intel and Micron will initially ramp the 25nm NAND device at IM Flash, followed by production within Micron's fab in Manassas, Va. Still to be seen, however, is when IM Flash will restart its delayed NAND fab in Singapore. Some analysts say that fab will ramp in 2011.

During a fab tour and press event at IM Flash, the companies provided some clues to a major question: How did the Intel-Micron duo defy the laws of physics and push the technology down to 25nm?

In theory, today's 193nm immersion scanners supposedly hit the wall around 35nm. IM Flash has been able to devise 25nm NAND chips with today's 193nm immersion lithography, plus self-aligned double-patterning (SADP) techniques, observers speculated. It is widely believed that IM Flash is using scanners from ASML Holdings NV and SADP technology, observers speculated.

IM Flash may also be using a form of phase-shift mask technology. "With the chip industry staying on Moore's Law and lithography stuck at the 193nm wavelength, chipmakers are looking to double-patterning to drive linewidth shrinks," according to a recent report from Barclays Capital.

"SADP is the technology of choice in NAND, with all players adopting SADP at the 32nm node. In our view, SADP was really the only choice due to (i) inadequate overlay and line edge roughness capabilities of the then existing litho tools, (ii) the simple nature of NAND 1-D structure, and (iii) availability of excess etch and CVD tool capacity," according to the report.

"Looking to the 22nm node, our checks suggest that SADP is the preferred option for all the major NAND manufacturers as development is already underway and litho tools by themselves alone are not yet ready to satisfy the requirements at 22nm," according to the report.

SADP is a costly but required process. "With only one critical litho step, the method solves overlay as no alignment adjustment is necessary. Only one critical litho step means that the overlay requirement is not important, and is no longer applicable as a deciding factor. SADP involves the use of two critical etches and the use of CVD to deposit a spacer film and hard-mask," it added.

Intel and Micron declined to elaborate on its 25nm manufacturing recipe, but they hailed the new announcement as a major achievement. The 25nm device propels "us in a pretty good lead" in NAND process technology, said Rod Morgan, IM Flash's co-executive officer, at the event.

IM Flash started production with a 50nm process in 2006, followed by a 34nm process in 2008. With today's 25nm process, the companies are extending their process leadership, added Tom Rampone, VP and general manager of Intel's NAND solutions group. "This will also help speed the adoption of solid-state drive (SSD) solutions for computing," he said. Intel is among a plethora of companies selling SSDs, based on NAND.

SSDs are among the applications for NAND flash. The 25nm NAND device will also reduce the costs for MP3 players, MCPs for cell phones and other products, said Brian Shirley, vice president of Micron's memory group. It could also enable new and low-cost tablet PCs. Apple Inc.'s new tablet, dubbed the iPad, makes use of NAND.

The introduction of the 25nm device also comes at the right time, as the NAND market appears to be recovering, he said. Demand is picking up, he added.

There is even talk about shortages in 2010. Gartner Inc. "maintains that prices are likely to remain stable in the coming months before briefly softening during the second quarter and experiencing substantial shortages in the second half of the year."

The worldwide NAND market is expected to hit Rs.86,845.08 crore ($18.807 billion) in 2010, up from Rs.71,186.46 crore ($15.416 billion) in 2009, according to IC Insights Inc. The overall IC market is expected to hit Rs.1,250,011.39 crore ($270.7 billion) in 2010, up 15 per cent over 2009, according to the firm. In 2009, the IC market hit Rs.1,087,006.58 crore ($235.4 billion), down 10 per cent.

Meanwhile, for consumer electronics manufacturers, the 25nm device from the Intel-Micron duo provides the highest-density in a single two-bits-per-cell MLC die that will fit an industry-standard, TSOP. Multiple 8GB devices can be stacked in a package to increase storage capacity.

For example, a 256GB SSD can now be enabled with just 32 of these devices (versus 64 previously), a 32GB smart phone needs just four, and a 16GB flash card requires only two. The 25nm, 8GB device is sampling now and is expected to enter mass production in Q2 10.

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