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Stage set for 3bit-per-cell NAND

Posted: 28 Jan 2010     Print Version  Bookmark and Share

Keywords:3bit-per-cell  NAND flash  storage solution 

3bit-per-cell NAND flash (Click on image to enlarge.)

Since the release of the first 56nm 3bit-per-cell 16-Gbit NAND technology in 2008 by SanDisk and Toshiba, the NAND industry has been working to commerciaise this multibit-per-cell technology. Technological challenges associated with process node migration and the economic condition of the NAND flash market (oversupplies and declining prices) has accelerated the development of multibit-per-cell technologies such as 3bit-per-cell and even 4bit-per-cell.

Since SanDisk and Toshiba's announcement of 3bit-per-cell technology in 2008, several more announcements have occurred in both 3- and 4bit-per-cell NAND flash technologies. 2009 was the year of 3- and 4bit-per-cell technology and product introductions, as Table 1 shows. All the major NAND manufacturers introduced or announced their technology and products in an effort to achieve more production efficiency.

The efficiency trends of various NAND flash technologies ranging from SLC, MLC, 3- and 4bit-per-cell technologies across several process node generations are shown inFigure 1. The efficiency improvements shown in 4xnm and 3xnm process node generations are combined results of process node migration and three- and four-bit-per-cell technology.

For example, at 43nm process node generation, four NAND flash products/ designs are introduced. By comparing their Mbit per mm² figures, you can see the impact of 3- and 4bit-per-cell technologies (shown in Table 2).

NAND flash efficiency trends (Click on image to enlarge.)

3bit-per-cell technology improves NAND flash efficiency dramatically without introducing a new process node: based on 32Gbit NAND example, the efficiency improvement of 3bit-per-cell technology is around 31 per cent. This is close to the efficiency improvement effect of migrating to the next process node. By introducing 3bit-per-cell NAND technology, the NAND industry is able to reduce chip size and improve productivity without the investment and heavy R&D efforts required to migrate to more advanced process node technology.

Products introduced in 2009 using 3bit-per-cell NAND technology include microSDHC memory cards and memory sticks. Given the requirement of sophisticated program, erase and read algorithms of 3bpc technology and extended error correction, these memory cards, which have NAND flash controllers inside, are better suited for commercial application of 3bit-per-cell NAND technology.

Table 1: 3-, 4bit-per-cell NAND flash manufacturers

At UBM TechInsights, we have begun analysing 3bit-per-cell manufacturer SanDisk's 43nm 3bit-per-cell 32Gbit NAND flash found in the SanDisk memory card. We're examining the detailed circuit of the NAND flash memory array and its associated blocks such as page buffers and wordline switches. We also plan to perform a waveform analysis of the NAND to dissect the programming, reading and erase operation of the 3bit-per-cell operation.

Also being analysed by UBM TechInsights is the Intel Micron's 32nm 3bit-per-cell 32Gbit NAND flash. Again, we're analysing the detailed circuit of the NAND flash memory array and its associated blocks such as page buffers and wordline switches.


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