Low-jitter clock IC suits broadcast video apps

The Si5324 replaces traditional multi-component video PLL products with a single clock IC while providing 80 per cent lower jitter than competing products. The Si5324 can generate almost any output frequency from 2kHz to 1.4GHz from any input frequency ranging from 2kHz to 710MHz, simplifying synchronisation in next generation multi-rate video equipment. Applications include video capture, conversion, editing, display, and distribution equipment that must be synchronised within video studios.

The Si5324 delivers jitter performance of 5ps pk-pk, providing significant margin to all existing and emerging video standards including 3G-SDI (SMPTE 424M). By meeting these standards with considerable margin, the jitter budget that would otherwise be allocated to clock generation can be applied to other components in the system, simplifying component selection and design.

The new clock IC incorporates all PLL components, eliminating the need for multiple PLL ICs, external filters and voltage-controlled crystal oscillator (VCXO) components. Based on Silicon Labs' patented DSPLL technology, the Si5324 has a digitally programmable loop filter that supports loop bandwidths ranging from 4 to 525 Hz as well as a low phase noise internal voltage-controlled oscillator. The DSPLL technology enables the Si5324 to provide jitter filtering while also eliminating sensitive noise entry points between loop filter and VCXO components, reducing design complexity and simplifying layout. Any-rate capability makes it possible for the Si5324 to generate and synchronise all common HD video and audio reference frequencies without any component changes, allowing one design for multiple applications and simplifying design re-use.

Pricing for the Si5324 is between Rs.872.63 Rs.2,780.76 ($17.95 and $57.20), depending on the selected output clock frequency range (A/B/C/D speed grades) in 1K quantities. Samples and production quantities are available now.

- Ismini Scouras
eeProductCenter