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Rambus, Kingston team for multi-core computing

Posted: 23 Sep 2009     Print Version  Bookmark and Share

Keywords:threaded module  DRAM  multi-core 

Rambus Inc. and Kingston Technology have reported on a joint effort to develop a threaded module prototype using DDR3 DRAM technology. The companies claim that their initial results show an increase in data throughput of up to 50 per cent and lower power consumption by 20 per cent compared to conventional modules.

As demand grows for throughput-intensive computing in notebooks, desktops and servers, the performance requirements on DRAM memory sub-systems rises dramatically. As a result, multi-core computing requires more bandwidth and higher rates of random access from DRAM memory.

"As multi-core computing becomes pervasive, DRAM memory sub-systems will be severely challenged to deliver the data throughput required," said Craig Hampel, Rambus fellow. "Our innovative module threading technology employs parallelism to deliver the higher memory bandwidth needed for multi-core systems while reducing overall power consumption. "

"The collaboration of our experienced teams produced a memory solution that helps overcome a major challenge with multi-core computing," said Ramon Co, VP of worldwide test engineering at Kingston.

Threaded memory module technology is implemented using industry-standard DDR3 devices and a conventional module infrastructure. It is capable of providing greater power efficiency for computing systems by partitioning modules into multiple independent channels that share a common command/address port. Threaded modules can support 64byte memory transfers at full bus utilisation, resulting in efficiency gains of up to 50 per cent when compared to current DDR3 memory modules. In addition, DRAMs in threaded modules are activated half as often as in conventional modules, resulting in a 20 per cent reduction in overall module power.

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