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Integrated bushold circuitry

Posted: 18 Sep 2009     Print Version  Bookmark and Share

Keywords:bushold circuitry  resistor  bushold pin 

Unused CMOS inputs that are left floating will experience a gradual charging of the gate input capacitance. A floating input may see an increase in static current, as both the NMOS and PMOS outputs will turn on and conduct current simultaneously. Or if the gate voltage reaches the threshold level with voltages between 0.8V and 2.0V applied to the inputs, the outputs will tend to oscillate. Large numbers of gates left floating, in a 16bit bus driver for example, will cause large amounts of current to be drawn by the IC. The floating gate charges up at a rate determined by its leakage current. Intermittent or random circuit errors may be seen with floating inputs, as outputs switch to a different state for no apparent reason.

A common solution for this is to connect the floating inputs to VCC or to ground through a pull-up or pull-down resistor. The disadvantage of this is an extra component needed and extra board space, and the resistor dissipates extra power. Hence, this pull-up resistor method is recommended for AC-powered systems and not for battery-operated equipment where power consumption is critical. Instead, a special feature called bushold circuit is used.

Bushold is an improved version of the internal pull-up resistor. It is a weak latch that recalls the last valid state of a pin when it is three-stated. Bus hold provides a small positive feedback current on device inputs. When an input changes logic state, the bus-hold circuit will return a small current back to the device input, effectively adding to the transition of the input. This positive feedback will then hold the final logic level until an active driver toggles the input voltage to the opposite logic state, where bushold will then again hold the logic state. A number of logic families use an integrated bushold circuit, which eliminates the need for external resistors and saves board space.

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