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DDR interleaving for PowerQUICC and QorIQ processors

Posted: 03 Sep 2009     Print Version  Bookmark and Share

Keywords:PowerQUICC  QorIQ processors  DDR interleaving 

This application note describes how to use and benefit from DDR memory interleaving in PowerQUICC and QorIQ processors. It details the use and benefits of memory interleaving with one-controller and then between two memory controllers. The guidelines and examples provide an easy-to-use "cookbook" for correctly setting the required register configurations for the selected interleaving type.

View the PDF document for more information.





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