Global Sources
EE Times-India
EE Times-India > EDA/IP

JasperGold now used in AMD design centres

Posted: 29 Apr 2009     Print Version  Bookmark and Share

Keywords:formal verification  AMD design centres  multiple processor 

Jasper Design Automation has signed a long-term agreement with AMD to place JasperGold formal verification technology in AMD design centres worldwide.

"Jasper is now broadly accessible to multiple processor and graphics projects," said Paul Tobin, Director of AMD's Verification Centre of Expertise, in a statement.

AMD's work with JasperGold exemplifies Jasper's "Targeted ROI" philosophy, solving customers' most critical design challenges in ways that also speed time to market, reduce overhead, and mitigate risk.

Tobin cited a recent example involving a complex, next-generation multi-core processor design. Designers wanted to prove that resource starvation would never occur in a new logic design; high-level analysis for which simulation alone is often insufficient.

Using JasperGold's interactive proof and liveness property capabilities, AMD was able to prove very early that this would not occur, saving extensive simulation time and gaining confidence in the extensive proof that formal verification can provide.

Jasper's customers have deployed over 100 successful chips in wireless, consumer, computing, and networking electronics.

-Nicolas Mokhoff
EDA DesignLine

Comment on "JasperGold now used in AMD design ce..."
*  You can enter [0] more charecters.
*Verify code:


Visit Asia Webinars to learn about the latest in technology and get practical design tips.


Go to top             Connect on Facebook      Follow us on Twitter      Follow us on Orkut

Back to Top