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Power, noise integrity platform rolls

Posted: 22 Apr 2009     Print Version  Bookmark and Share

Keywords:noise integrity  power network  power noise  substrate network 

Apache Design Solutions has introduced what it claims is the industry's first integrated power and noise integrity platform that addresses the challenges associated with global couplings of power/ground noise, substrate noise, and package / PCB capacitive and inductive noise, for analogue, mixed-signal, memory, and high-speed I/O designs. Totem is a comprehensive platform that incorporates transistor-level noise injection, parasitics extraction, package modelling, dynamic analysis, and design debug in a single-flow environment.

Totem's key technology is based on the concurrent analysis of noise propagation through the power delivery network, substrate network, and package/PCB parasitics. It accurately analyses noise coupling effects at every time-point using a single-kernel solver. This advanced technology enables designers to account for all global noise impacts on their designs, a critical challenge for post sub-micron mixed-signal SoCs.

Totem is a full-chip layout-driven analysis solution integrated with existing analogue environments. It provides cross-probing of analysis results with industry standard circuit design tools for efficient debugging, fixing, and optimisation. Designers can use Totem for early stage prototyping to guide their power network and package design. In addition, Totem can be used for chip sign-off and post-silicon debug.

Accurate power/ground noise analysis
The accuracy of power noise analysis is critical for functionality, timing, and reliability of analogue designs. Totem incorporates transistor-level power model with voltage de-rated switching current technique, and SPICE-accurate decoupling capacitance extraction. In addition, impact of package and board effects is included through the support of broadband S-parameter package and PCB models.

Totem delivers the capacity required for stand-alone DRAM, Flash, and CMOS image sensors, as well as embedded memory macros. It leverages RedHawk-NX's mesh pattern recognition (MPR) extraction technology and multi-core simulation engine to handle hundreds of millions of transistor designs overnight.

Totem also offers simulation-based electro-migration (EM) validation for power and signal nets. It supports both Root Mean Square (RMS) and Peak current EM checks, which are critical for advanced process nodes, in addition to conventional average current-based methods.

Substrate noise coupling
Increasing power density and higher speed of digital components creates significant noise injection into the substrate. Furthermore, limited die real estate is impacting the effectiveness of the guard-ring structure for analogue macros. Accurate substrate noise analysis is critical to high performance mixed-signal and RF designs.

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