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H.264 decoder solution boasts high performance

Posted: 22 Apr 2009     Print Version  Bookmark and Share

Keywords:H.264 decoder  design services  Virtex FPGA  IP solution 

CoreEL Technologies, a Bangalore-based FPGA IP & design services company, has announced the availability of the H.264 high profile decoder IP solution on Xilinx Virtex FPGAs, targeted for professional decoder & broadcast infrastructure markets.

With a maximum resolution support of 1920x1080 (FullHD) at 60 frames per second, the IP introduces a new level of performance and functionality. The H.264 HP decoder supports 4:2:0, 4:2:2 and 4:4:4 chroma formats with programmable bit depth from 8-bit to 12-bits.

The decoder brings further speed improvements to achieve simultaneous multiple stream decode with resolutions up to 1920x1080 interlaced and progressive, easily decoding full HD at optimal frame-rates at only 125 MHz clock frequency with CABAC / CAVLC running at 50Mbps and 100Mbps respectively. The IP is capable of supporting both H.264 Intra only frame decoding as well as Inter frames (IPB) decoding. The solution is fully validated in hardware with ITU-T and Franhoufer test streams. The decoder solution is currently being licensed to one of the leading OEMs in professional decoder/ broadcast market.

"Combining our expertise in FPGA design as well as in video technologies, we have developed H.264 MP and HP decoder IP solution with compelling features and performance to drive the high end broadcast & professional infrastructure markets," says Vishwanath Padur, vice president, sales and marketing at CoreEL Technologies.

CoreEL H.264 high & main profile IPs are now available for licensing. The decoder runs on Xilinx Virtex-5 FPGAs and comes with Verilog source code / netlist, a test bench, test data and complete technical documentation.

For technical articles on H.264 technology, visit Embedded Design India

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