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EE Times-India > EDA/IP

Apache, STMicroelectronics take on power and noise challenges for 45/32nm

Posted: 23 Feb 2009     Print Version  Bookmark and Share

Keywords:45nm  32nm  power and noise 

Apache Design Solutions, Inc. and STMicroelectronics are extending their long-standing collaborative efforts to include tackling of power and noise challenges associated with 45nm and 32nm designs. Previous collaborations of the two companies have resulted in the delivery of power and noise solutions for SoC power signoff, advanced low power design validation, custom IP analysis and modelling, and early-design power/ground grid prototyping.

This collaboration expands ST's use of Apache's RedHawk and Sentinel platforms to address the upcoming design challenges such as 3D-IC power integrity, DDR jitter detection and prevention, chip-package-system convergence and EMI analysis.

"We selected Apache as our partner for power and noise integrity, because of their solid technical vision, their specific focus and their expertise in this very important and difficult area, as well as for the quality of their R&D and support teams," said Philippe Magarshack, group VP of Technology R&D at STMicroelectronics. "By collaborating with Apache, we expect to address early on the global power and noise issues brought by the 45/40nm and 32/28nm technology nodes. These early solutions will help us reduce system cost and mitigate SI- and power-integrity-related design failure risks."

"We are excited to further deepen our partnership with ST to address the upcoming convergence challenges for the 45/32nm designs," said Andrew Yang, CEO of Apache. "We look forward to our continued technical collaboration and gaining their insight to further develop new technologies for power and noise integrity."

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