Global Sources
EE Times-India
EE Times-India > EDA/IP

Reinvent JTAG for SoC debugging

Posted: 05 Feb 2009     Print Version  Bookmark and Share

Keywords:IEEE 1149.7  JTAG  debug 

IEEE 1149.7 is a complementary superset of the widely adopted IEEE 1149.1 (JTAG) standard that has been in use for more than two decades. Although the new IEEE 1149.7 has not been finalised, its direction and its benefits to engineers—particularly those developing and debugging software for complex systems—are well defined.

IEEE 1149.7 was created with several goals in mind—to maintain backward compatibility with 1149.1 and improve debug performances. IEEE 1149.7 also reduces System-on-Chip pin-count requirements and provides standardised power-saving operating conditions. While IEEE 1149.7 adds substantial functionality to the existing standard, it's important to note that IEEE 1149.7 isn't a replacement for IEEE 1149.1. Backward compatibility is maintained so that any board or system that integrates chips that support either standard is amenable to test or debug procedures.

View the PDF document for more information.

Comment on "Reinvent JTAG for SoC debugging"
*  You can enter [0] more charecters.
*Verify code:


Visit Asia Webinars to learn about the latest in technology and get practical design tips.


Go to top             Connect on Facebook      Follow us on Twitter      Follow us on Orkut

Back to Top