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Manage basic terminations and decoupling

Posted: 31 Oct 2008     Print Version  Bookmark and Share

Keywords:associated components  schematic capture  spreadsheets for interconnects 

In this era of convergence of different media, chips incorporate more and more functionality. A typical design today contains a small number of complex chips with large pin counts. As clock speeds and pin count increases, every chip requires a large number of passive devices like terminations, bypass capacitors, power filters, pull-ups and pull-downs to preserve signal integrity and meet power requirements. These components are collectively termed as "associated components." For example, the Pentium IV processor requires at least 50 bypass capacitors, about 200 resistors and 100 power delivery components.

Design engineers today have to invest a significant amount of time capturing associated components logic and keeping it in sync during editing operations such as copying, moving or deleting the parent IC. This reduces productivity, distracts attention and introduces scope for errors.

This article by Vikas Kohli of Cadence discusses how associated circuitry is captured in today's schematic capture solutions and the limitations of this approach. It also describes how the spreadsheet environment discussed in the article "Speed design capture using spreadsheets for interconnects" can be customised to accelerate capture and provide better management of associated circuitry.

View the PDF document for more information.

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