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EE Times-India > EDA/IP

Calypto, Forte team-up advances SystemC flow

Posted: 31 Oct 2008     Print Version  Bookmark and Share

Keywords:SystemC  SoC  multimedia  verification 

The collaboration of Calypto Design Systems and Forte Design Systems-work that has spanned over three years-has produced an advanced SystemC design flow that covers verification and implementation of consumer and multimedia electronics.

The integration of Calypto's SLEC System-HLS formal verification software and Forte's Cynthesizer SystemC synthesis offers a complete SystemC-to-register transfer level (RTL) design flow. This system-level solution has been proven by one of Japan's largest integrated device manufacturers (IDM) to support the complexity and capacity requirements of multi-million gate system-on-chip (SoC) designs.

Both products have been extensively tuned on numerous SystemC designs to satisfy sophisticated user requirements, such as custom interface specifications, external memory interfaces and fixed point datatypes. The advanced SystemC design flow enables users to specify and verify SoC functionality, communication and timing at the system level. SLEC verifies the equivalence of two SystemC models during system-level model refinement and comprehensively verifies the RTL code generated from Cynthesizer.

"High-level synthesis continues to provide a significant time-to-market advantage for design teams around the world," says Sean Dart, Forte's president and CEO. "Coupled with sequential logic equivalence checking, designers can further improve their productivity and confidence using industry standard SystemC in their ESL design flow."

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