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Interfacing multiple serial EEPROMs on I2C bus

Posted: 16 Oct 2008     Print Version  Bookmark and Share

Keywords:CAT24WCXX  EEPROM  I<sup>2</sup>C bus 

This application note by Denisa Stefan presents I2C bus device addressing solutions and addresses in particular the issues raised by the parallel programming of multiple CAT24WCXX serial EEPROMs from Catalyst Semi.

Information transfer between I2C devices connected to the I2C bus system requires two signals, serial data (SDA) and serial clock (SCL). A device connected to the bus can operate as a transmitter or receiver. A master device initiates a data transfer on the bus, generates clock signals and terminates the transfer. The device addressed by the master is considered a slave.

To connect devices on an I2C multi-master bus, the SDA and SCL lines must be bi-directional and connected to a positive supply voltage through pull-up resistors. The I2C bus address procedure assumes that the first byte after a START condition determines the slave selected by the master. A slave address is seven bits long and is usually made-up of a fixed and a programmable part. The eighth bit (LSB) determines the direction of the transfer, (R/W). The programmable part of the slave address enables the maximum possible number of identical devices to be connected to I2C bus. This depends on the number of address input pins an I2C device has.

View the PDF document for more information.





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