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Partial page programming feature of MirrorBit ORNAND

Posted: 09 Oct 2008     Print Version  Bookmark and Share

Keywords:partial page programming  MirrorBit ORNAND  NAND interface 

The partial page programming feature of the MirrorBit, ORNAND MS-P and ML-P families are illustrated in detail within this application note. ORNAND, is a new architecture based upon MirrorBit technology and is intended for use as a data storage complement to the NOR portfolio of solutions. The MS-P and ML-P are the NAND interface families of MirrorBit ORNAND and are the 1.8V and 3V sub-families, respectively.

Consistent with the NAND interface, the basic programming unit in ORNAND is a page; however, programming into smaller portions in a page is possible by making use of partial page programming. ORNAND supports the partial page programming feature similar to other NAND devices. To facilitate partial page programming, every page is further divided into eight segments (four in the data area, four in the spare area). Each segment in the page acts as an independent programmable unit; they can be programmed individually or in any combination of segments. The maximum number of consecutive partial page programs allowed for each segment is one. That is, every segment in the page can be programmed once, and a page can be programmed up to eight times before a block erase is required.

View the PDF document for more information.





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