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MirrorBit flash power and timing requirements

Posted: 09 Oct 2008     Print Version  Bookmark and Share

Keywords:MirrorBit  NOR flash  timing requirements 

MirrorBit NOR flash has several unique reset control signal timing requirements. Timing requirements vary by MirrorBit process and family (230nm, 110nm, 90nm, GLxxxM, WSxxxN, etc...). System designers must accommodate these requirements for reliable operation.

Reset timing in the first MirrorBit generation of devices works very similar to floating gate NOR flash. The power and timing requirements for power-on-reset and warm-RESET (also known as Hard Reset) for the CS99/CS99S MirrorBit devices (all families) are reviewed in this document.

View the PDF document for more information.

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