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ST engineers detail domino logic

Posted: 24 Sep 2008     Print Version  Bookmark and Share

Keywords:domino logic  circuit design  automated framework  ASIC 

Engineers at STMicroelectronics have revealed how to use domino logic, a very fast circuit design style utilised in the highest performance custom designs, in an automated framework. The approach, documented in the book High Performance ASIC Design: Using Synthesisable Domino Logic in An ASIC Flow written by Razak Hossain, a senior principal engineer working at ST is the first to describe a detailed methodology for using domino logic in a standard automated design flow.

Digital logic is the largest segment of the semiconductor market today. The implementation of digital logic is currently dominated by automated logic synthesis and physical design methodologies. These techniques allow digital designs to be completed in less time and with fewer designers than custom design techniques, which is now limited only to microprocessors and a small group of very high performance digital designs. While it is possible to imitate many of the high performance digital design techniques in custom designs using an ASIC design methodology, standard ASIC design flows do not support the use of domino logic.

The ability to easily use domino logic allows it to be selectively applied in a much larger application space. For example, as VLSI systems increasingly become systems on a chip, many traditional system level optimisations will be made on a chip. If a faster synthesisable domino logic processor core can replace several slower cores, this leads to a cost reduction. Alternately, if a legacy design needs to be made to run faster it can be done so by implementing it with domino logic without incurring the cost of re-designing the microarchitecture and porting the software.

Another application of high speed digital logic is in scaled CMOS mixed-signal applications where it can be used to control analogue and RF circuitry. The judicious use of domino logic in critical blocks minimises the power overhead in its use, while maximising the performance of any process technology.

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