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Multi-chip package provides high-density memory

Posted: 13 Aug 2008     Print Version  Bookmark and Share

Keywords:DDR2  SDRAM-based  multi-chip packages  8Gb 

White Electronic Designs Corp. (WEDC) has expanded its family of DDR2 SDRAM-based multi-chip packages (MCPs) with the launch of an 8Gb device. The SDRAM is organised as 128M x 72, packaged in a 16 x 22mm, 352mm2, 208 plastic ball grid array (PBGA). This package provides high-density memory for extended-environment embedded computing.

Benefits include higher board density and routing advantages, with 56% more space savings and a 50% reduction in I/O count over a comparable FPBGA approach. Reduced trace lengths result in lower parasitic capacitance. Other advantages include lower weight and a 1mm pitch that allows for larger balls on the ball grid.

The 8Gb DDR2 SDRAM is a high-speed CMOS, dynamic random-access memory with pipelined, multi-bank architecture that allows for concurrent operation and provides high, effective bandwidth. Available at data rates of 667, 533 and 400 Mbs in commercial, industrial and military temperature ranges, this MCP provides an upgrade path for the 64Mx72 package that is used on applications such as integrated core processors and radar systems.





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