Global Sources
EE Times-India
Stay in touch with EE Times India
EE Times-India > Processors/DSPs

Tech Tutorial: Programming high-performance DSPs

Posted: 27 Nov 2006     Print Version  Bookmark and Share

Keywords:DSP  VLIW pipelines  multi-level memory 

Many of today's digital signal processing (DSP) applications are subject to real-time constraints. Many applications eventually grow to a point where they are stressing the available CPU and memory resources. These applications seem to be trying to fit ten pounds of algorithms into a five-pound sack.

Understanding the architecture of the DSP can greatly speed up applications. This article explains the features of high-performance DSPs, with a focus on VLIW pipelines and multi-level memory architectures. It also introduces and explains how direct memory access (DMA) is used.

View the PDF document for more information.

Comment on "Tech Tutorial: Programming high-perf..."
*  You can enter [0] more charecters.
*Verify code:


Visit Asia Webinars to learn about the latest in technology and get practical design tips.


Go to top             Connect on Facebook      Follow us on Twitter      Follow us on Orkut

Back to Top