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EDA/IP  

CoWare platform architect supports Tensilica's 32-bit processor

Posted: 22 Nov 2007     Print Version  Bookmark and Share

Keywords:32-bit processor core  Platform Architect  systems-level companies 

CoWare Inc. and Tensilica Inc. have announced the integration of Tensilica's Diamond Standard 106Micro, the smallest

licensable 32-bit processor core, with CoWare Platform Architect. The integration provides designers with the first and most productive ESL 2.0 solution for platform architecture design, platform verification and software development using Tensilica's processor core with the smallest area, lowest power and highest performance on the market, the company claims.

This new integration extends the relationship between CoWare and Tensilica to the entire Diamond Standard and Xtensa

configurable processor product lines. Tensilica's processors are already being used by designers with CoWare Platform

Architect to perform architecture performance analysis for critical design considerations such as software execution, memory architecture,and bus occupancy resulting in the design of better products faster.

"Our mutual customers have discovered the productivity increase available with CoWare's powerful tools and their support for ESL 2.0," stated Steve Roddy, Tensilica's VP of marketing. "By working together with CoWare, we've been able to help our customers significantly accelerate their SoC platform design cycles."

"By supporting such a small, low-power, efficient processor, we're providing our customers with yet another industry-leading processing option in their designs," stated Tom De Schutter, marketing manager,IP and third-party relationships, CoWare. "A number of large systems-level companies are using CoWare's ESL 2.0 solutions with Tensilica's cores."

The Diamond Standard 106Micro core measures less than 0.1mm² in 65-nanometer GP process technology while using just 0.029mW/MHz of power. It can achieve up to 300MHz in an area-optimised 65-nanometer GP design or 620MHz in a speed-optimised 65-nanometer GP design. This gives it a remarkable 750 Dhrystone MIPS of performance in a very

small area. The Diamond Standard 106Micro is particularly attractive to designers upgrading from 8- and 16-bit controllers to a 32-bit processor for extra performance and C-level programming flexibility,as well as designers needing a small, efficient system or subsystem-level controller for applications ranging from peripheral and interface design to networking, automotive, industrial control, and consumer devices such as toys, games and entertainment devices.

CoWare Platform Architect is the tool for platform architecture design, platform verification and software development.

For Platform-driven ESL Design, CoWare Platform Architect is one of the most productive SystemC-based graphical environment for capturing the entire product platform and the dash board for initiating the platform analysis functions. Using CoWare Platform Architect helps developers minimise development risks, accelerate development cycles and improve product performance, leading to delivering better products faster.

Tensilica's Diamond Standard 106Micro is shipping with CoWare's 2.0 ESL technology.




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