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SMIC offers CPF-based Cadence low-power digital reference flow

Posted: 24 Oct 2007     Print Version  Bookmark and Share

Keywords:digital reference flow  low-power solution  intellectual property 

Semiconductor Manufacturing International Corporation (SMIC) and Cadence Design Systems have announced that SMIC is offering a Common Power Format (CPF)-based 90nm low-power digital reference flow and CPF-compliant libraries. SMIC also announced that it has joined the Power Forward Initiative (PFI).

The new flow uses intellectual property developed by SMIC and employs the Cadence Design Systems Low-Power Solution which is designed to increase productivity, manage design complexity, and shorten time to market. This flow is the result of a joint effort by Cadence and SMIC which further strengthens their relationship and speeds up low-power designs for their mutual customers who face low-power design challenges.

The SMIC reference flow (3.2), employing Cadence technology, is a complete CPF-enabled RTL-to-GDSII low-power flow aimed at efficient energy use for 90nm SoC designs. It incorporates SMIC 90nm logic low leakage 1P9m 1.2/1.8/2.5V generic process and commercial low-power library support. The flow features power awareness throughout all necessary design steps including logic synthesis, simulation, design for test, equivalence checking, silicon virtual prototyping, physical implementation and complete signoff analysis.

"Joining the Power Forward Initiative shows our support for this industry-wide low-power effort and our pursuit of bringing advanced low-power solutions to our end users," said David Lin, senior director, Design Services Division at SMIC. "As advanced process nodes continue to shrink beyond 90nm, two key issues have emerged: manufacturability and testability. The SMIC reference flow, based on the Si2 standard CPF, is a response to these issues, giving us an efficient high-yield process that delivers the highest quality of silicon."

"Cadence welcomes SMIC as a new member of the Power Forward Initiative and their commitment to the success of the industry," said Dr. Chi-Ping Hsu, corporate VP, IC Digital and Power Forward at Cadence. "It is critical for the semiconductor industry to work closely together to advance low-power technologies, design, and production solutions."

CPF is an Si2-approved standard format for specifying power-saving techniques early in the design process?enabling sharing and reuse of low-power intelligence. The Cadence Low-Power Solution is the industry's first complete flow that integrates logic design, verification, and implementation with the Si2-standard Common Power Format.

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