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Altera stakes 45nm success on relationship with TSMC

Posted: 23 Oct 2007     Print Version  Bookmark and Share

Keywords:45nm node  transistor leakage  IR drop 

Altera Corp.'s foray into FPGAs produced at the 45-nanometer node will leverage a collaborative relationship with foundry Taiwan Semiconductor Manufacturing Co. Ltd. that both partners say grows more important as geometries shrink.

TSMC unveiled its 65-nm manufacturing process two years ago, starting with a version optimised for low power and then adding a high-speed version. The process included the use of such emerging technologies as strained silicon, nickel silicide, low-k dielectrics and copper interconnects.

"All of these fundamental technologies and techniques are to be used in the 45-nm process, but new challenges abound," said Mojy Chian, VP of technology development at Altera. "There are many more transistors on the die, and they are packed very close. And transistor leakage is way up because they are running much faster."

Chian noted that the transistors at 45nm exhibit a higher IR drop, as well as a supply voltage that hovers around 0.9 to 1.0 volt, limiting possibilities for further scaling. The only way to get these issues under control, he said, is "through a strong collaboration with TSMC."

"This September, we had 45nm completely qualified and ready for early production," said Di Ma, VP for field technical support at TSMC North America. "Of course, the transistors at 45nm have zero degrees of separation, making it very difficult to improve yields, especially with the restricted design rules and stringent engineering we use on the transistors at 45nm.

"A lot of nasty things are coming together. While we firmly believe in Moore's Law, at 45nm we are faced with aggressive, concurrent process and design challenges. The only way we can overcome the hurdles is to cooperate."

Altera and TSMC have worked together exclusively in FPGA technology for more than 12 years. "We continually refine the manufacturing process, making the implementation of current and future nodes as consistent and efficient as possible," said Altera's Chian. He pointed to one product of the partnership: Altera's Cyclone III family of low-power, 65-nm FPGAs, manufactured at TSMC's two 300-mm "GigaFabs."

Ma said TSMC delivers a new advanced-technology generation every two years. Each node surpasses the previous one by close to half the area and "features 30 to 50 per cent more performance, while supporting similar leakage levels." TSMC ramps a node at multiple 300-mm GigaFabs, which can produce more than 100,000 12-inch wafers per month when at full capacity.

?The TSMC 45-nm process combines 193-nm immersion photolithography, strained silicon and extreme low-k intermetal dielectric material,? said Ma."The 45-nm low-power process provides double the gate density of 65nm with significantly lower power and manufacturing costs per die, making it ideal for small-footprint designs, like those used in cell phones and other handheld devices."

But at 45nm, there are constant adjustments to be made.

"The device-modeling parameters are increasing tremendously," said Altera's Chian. "The latest modeling parameters that need to be extracted use up to 90,000 lines of code, compared with some 40,000 lines for the 65-nm process. By constantly feeding off the design-process feedback mechanism set up within our 10- to 12-person teams, we can be sure to meet our goals."

Altera expects to offer 45-nm FPGAs next year.

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