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Use SI methods to debug DDR

Posted: 16 Sep 2007     Print Version  Bookmark and Share

Keywords:SI  signal integrity  DDR memory validation  mixed-signal oscilloscope  differential active voltage probes 

As speed increases, validation effort increases exponentially. For the memory system to function accurately, its signal integrity (SI) performance must meet certain minimum requirements. SI is the key to system interoperability—it guarantees that devices from different vendors will integrate well when they are used together. Failures in SI are correlated to other failures, including marginal timing relationship, protocol violations, clock jitter issues and errors from other buses.

This article outlines probing methods, challenges in DDR signal validation and recommended debug methodologies. View the PDF document for more information.

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