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EU project's embedded roadmap centres on multi-core, compilation

Posted: 04 May 2007     Print Version  Bookmark and Share

Keywords:embedded roadmap  HiPEAC project  HiPEAC embedded roadmap 

HiPEAC, a project on high performance embedded applications and compilers, has produced a guide to the major challenges facing embedded applications for the next several years.

Started in 2004 with European Union funding, HiPEAC has been set up to address the design and implementation of commodity computing devices in the 10-year horizon, covering the processor design, the optimising compiler infrastructure and the evaluation of upcoming applications made possible by the increased computing power of future devices.

Although this "network of excellence" is primarily academic it includes engineers from ACE Associated Computer Experts BV, ARM Holdings plc, STMicroelectronics NV, NXP BV, Virtutech Inc., Xyratex Ltd and IBM and Intel in Israel on its list of participants.

After a process of brainstorming and discussion, a set of the leading academics within the network has produced the first HiPEAC research roadmap. In total 55 key challenges organised under 10 themes are listed in this roadmap. The list of challenges can serve as a source of reference for researchers and help companies building their own R&D roadmap, the authors said.

The themes include single and multi-core architectures, interconnection, programming models and tools, compilation, runtime systems, benchmarking, simulation and system modelling, reconfiguration, and real-time operation.

"The exponential improvement of application performance across computer generations will come to an end if we do not succeed in adapting our applications to the parallel resources of future computer systems," the roadmap concludes.

- Peter Clarke
EE Times Europe

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