Global Sources
EE Times-India
Stay in touch with EE Times India
EE Times-India > Processors/DSPs

Reference system: MCH OPB DDR SDRAM with OPB Central DMA

Posted: 03 May 2007     Print Version  Bookmark and Share

Keywords:OPB DDR SDRAM  OPB Central DMA  MicroBlaze parameters 

Targeted for the Xilinx SP305 Spartan-3 development board, this reference system describes how to set up MicroBlaze parameters for caching, the clocking structure for the MCH OPB DDR SDRAM, and parameters for OPB burst transactions from the OPB Central DMA controller.

View the PDF document for more information.

Comment on "Reference system: MCH OPB DDR SDRAM ..."
*  You can enter [0] more charecters.
*Verify code:


Visit Asia Webinars to learn about the latest in technology and get practical design tips.


Go to top             Connect on Facebook      Follow us on Twitter      Follow us on Orkut

Back to Top