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Synthesisable CIO DDR RLDRAM II controller for Virtex-4 FPGAs

Posted: 27 Apr 2007     Print Version  Bookmark and Share

Keywords:Virtex-4  Common I/O  DDR  RLDRAM II  Xilinx 

Virtex-4 device is used to interface to Common I/O (CIO) Double Data Rate (DDR) Reduced Latency DRAM (RLDRAM II) devices. This application note describes reference design targetting two CIO DDR RLDRAM II devices at a clock rate of 200/235MHz with data transfers at 400/470Mbps per pin.

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