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Intel announces teraflop capacity on a chip

Posted: 13 Feb 2007     Print Version  Bookmark and Share

Keywords:Intel  teraflop 

On its road to boost tera-scale computing capacity for future PCs and servers, Intel Corp. researchers have developed the 'first' programmable processor that offers teraflop performance on a single 80-core chip while consuming only 62W-less than many single-chip processors today. Intel has no plans to bring the chip to market but is optimistic that this research chip will pave for specific insights in silicon design methodologies, high-bandwidth interconnects and energy management approaches.

"Our researchers have achieved a wonderful and key milestone in terms of being able to drive multi-core and parallel computing performance forward," said Justin Rattner, Intel senior fellow and chief technology officer. "It points the way to the near future when teraflops-capable designs will be commonplace and reshape what we can all expect from our computers and the Internet at home and in the office."

The 80-core chip achieves the same teraflop performance realised a decade ago on the ASCI Red Supercomputer built by Intel for the Sandia National Laboratory. In the new multi-core chip, Intel squeezed the teraflop performance of the supercomputer which then took up over 2,000ft², was powered by about 10,000 Pentium Pro processors and consumed over 500kW.

The chip offers a tile design in which smaller cores are replicated as 'tiles,' allowing for easier design of single-chip multi-core processors. The research chip also features a mesh-like 'network-on-a-chip' architecture to allow ultra high bandwidth communications between cores and to process Terabits of data per second inside the chip.

In achieving further the goals of its Tera-scale Computing Research Program, Intel will focus on the addition of 3D stacked memory to the chip as well as developing more advanced prototypes with many general-purpose Intel architecture-based cores.

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