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Freescale develops QUICC III Engine Tech processor family

Posted: 17 Oct 2006     Print Version  Bookmark and Share

Keywords:Freescale Semiconductor  MPC8568E  MPC8567E  PowerQUICC III  CPU core 

Broadband access equipment manufacturers now can integrate control and data path functions onto a single semiconductor device with the introduction of an advanced PowerQUICC III processor family from Freescale Semiconductor Inc.

Compatible with previous generation PowerQUICC offerings, the MPC8568E and MPC8567E processors offer a Gigahertz CPU core, flexible QUICC Engine technology and high-speed system interfaces for multi-protocol inter-working.

The devices are designed specifically to address increasing performance requirements for broadband access technology and enable the creation of highly advanced equipment including 3G/WiMAX/LTE basestations, RNCs, gateways and ATM/TDM/IP solutions. A high-performance e500 core built on Power Architecture technology works together with 512KB Level 2 (L2) cache to operate up to 1.33GHz and deliver more than 3,000 Dhrystone MIPs.

The processors feature high-speed interfaces including Gigabit Ethernet, PCI Express and Serial RapidIO interconnect technology to enable high-speed links to industry-wide switches, FPGAs, ASICs and DSPs.

"The transition to packet-based networks and deployment of IP-based services is reshaping wireline and wireless access. The transition, however, is gradual instead of instantaneous. Communications equipment makers, therefore, need to deliver systems that are cost-effective, powerful, and capable of handling both legacy and IP protocols," said Joseph Byrne, senior analyst with The Linley Group and author of A Guide to Access Processors. "To address these needs, these PowerQUICC III devices integrate a variety of high-speed interfaces and fast processors, including—uniquely—a 1.33GHz e500 core."

The MPC8568E and MPC8567E devices are the first PowerQUICC III processor products to incorporate QUICC Engine technology, a programmable SoC function block that accelerates communications protocols such as ATM, POS, Ethernet, PPP, HDLC and TDM. QUICC Engine technology enhances overall system performance by offloading multi-protocol processing and inter-working from the Power Architecture processing core, which is freed to address higher-level software tasks. It delivers the packet throughput, autonomous multi-protocol inter-working, high channel density and software compatibility that equipment manufacturers need to develop advanced yet economical solutions for converged packet networks.

Additional integrated features include a Table Lookup Unit, a DDR1/2 memory controller, hardware acceleration for double precision floating point and a high-performance security engine.

A security engine integrated into both of the devices accelerates a wide range of algorithms and modes, such as DES/3DES, AES, ARC-4, Kasumi, MD5, SHA1/2, RSA and Elliptic Curve. It enables the PowerQUICC III processors to offer up to 1Gbps throughput for widely used commercial security protocols, such as IPSec, SSL/TLS and 3GPP.

Robust enablement support is available to increase reuse, simplify development and speed time to market. The devices ship with standard microcodes, providing industry-proven firmware for existing protocols and downloadable RAM microcode packages that provide support for new functionality or protocols. These microcode offerings help protect existing system investments and enable customisation via Freescale's Open QUICC Engine technology developer program.

Initial samples of the MPC8568E and MPC8567E processors with QUICC Engine technology are planned for Q1 2007. Pricing starts at Rs.4,657.97 ($100.80) for quantities for 10,000.

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