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Synopsys releases verification IP for OCP interface

Posted: 15 Sep 2006     Print Version  Bookmark and Share

Keywords:Synopsys  DesignWare  IP  OCP interface 

Synopsys Inc., a provider of semiconductor design software has expanded its portfolio of DesignWare Library intellectual property (IP) with the release of verification IP for the Open Core Protocol (OCP) interface. OCP is a common standard IP core interface that facilitates "plug and play" SoC design.

Synopsys has developed verification IP for the OCP interface in response to customer demand for using the DesignWare Library and VCS Verification Library to verify systems and cores that utilise OCP.

The DesignWare Library and VCS Verification Library include verification IP for AMBA 2.0, AMBA 3 AXI, PCI Express, USB, Serial ATA, Ethernet, I²C, serial I/O and memories. The addition of OCP 2.1 to the portfolio enables the verification of OCP cores, OCP systems, mixed OCP/AMBA systems and OCP systems to their external interfaces. The OCP verification IP provides 100 per cent coverage as defined in section 4 of the OCP 2.0/2.1 compliance checks document. The OCP Verification IP supports all popular simulators and enables up to five times faster verification when used with the VCS comprehensive functional verification solution.

"Synopsys' DesignWare and VCS Verification IP are welcome additions to OCP's robust, thriving ecosystem," said Ian Mackintosh, president of OCP-International Partnership.

Synopsys DesignWare Verification IP for OCP 2.1 is available on a limited basis now as part of the DesignWare Library and VCS Verification Library products. Licensees of DesignWare Library and VCS Verification Library will gain access to OCP Verification IP for no additional charge. Production release is scheduled for November 2006.




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