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Xilinx releases interoperable interfaces for TI DSPs

Posted: 18 May 2006     Print Version  Bookmark and Share

Keywords:Xilinx Inc.  interoperable interfaces  TI DSPs 

Xilinx Inc. has announced the availability of two interfaces for Texas Instruments' (TI) DSPs. The Xilinx Serial RapidIO interface for use with Virtex-4 and Virtex-II Pro FPGAs provides up to 10Gbps serial links to TI's TMS320C6455 DSPs.

In a statement issued to EE Times India, Xilinx said that Serial RapidIO would allow developers to use it as a higher performance interconnect for embedded processors. Products based on RapidIO's first set of complete specifications are targeted at embedded computing, defence, networking and telecom line cards, and make use of a parallel physical layer. Most importantly, RapidIO is an ISO standard that can potentially transmit up to 20Gbps.

The high-speed link enables designers targeting TI DSPs to use Xilinx FPGAs for DSP acceleration, bus bridging, logic consolidation or implementing peripherals. The VLYNQ interface provides a bridge to the CoreConnect bus on Xilinx Spartan-3 and Spartan-3E FPGAs. This allows designers to use FPGAs to expand the number of peripherals for their DaVinci technology-based TMS320DM644x Digital Media Processor, or any TI DSP with a VLYNQ interface.

"Collaboration with DSP ecosystem leaders such as TI is a cornerstone of our digital signal processing strategy and roadmap," said Omid Tahernia, general manager and vice president of the DSP division at Xilinx. "These interfaces build on the co-processing platforms we delivered last year and pave the way for more synergistic solutions in the future."

"Our TI DSP solutions now have standardised high-speed interfaces to Xilinx FPGAs," said Joe Rigazio, DSP general manager for Worldwide Catalog and Emerging End Equipments at Texas Instruments. "Working together, TI and Xilinx reduce customer time-to-market for complex system designs in video client/infrastructure and digital communication markets."

The Serial RapidIO interface provides a very high speed connection between the FPGA and TI C6455 DSPs, which enables high throughput for both data and clock. Xilinx RapidIO interface supports x1 and x4 lane Serial RapidIO links in both the Virtex-4 FX and Virtex-II Pro FPGA platforms. Both x1 and x4 lane configurations support operating link speeds of 1.25-, 2.5- and 3.12Gbps per lane.

VLYNQ is a serial low-pin count communications interface capable of operating up to 125MHz. The Xilinx VLYNQ interface provides a bridge to the CoreConnect On-chip Peripheral Bus (OPB) available on Xilinx FPGAs. With the VLYNQ interface, designers can use TI TMS320DM6443 and TMS320DM6446 Da Vinci-based processors to communicate to custom-built or standard microprocessor peripherals such as extra UARTs and SPIs implemented on Spartan-3 and Spartan-3E FPGAs. The VLYNQ interface follows the delivery of the EMIF interface and video-coprocessing kit for the DM642EVM by Xilinx.

Designers can still communicate between Xilinx FPGAs and TI DSPs via the EMIF interface. In addition, they have the choice to interface to the FPGAs using VLYNQ, and use the EMIF interface for interfacing TI DSPs to external memory, thus delivering higher system performance.

- Krishnan Sivaramakrishnan
EE Times India

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