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Team IBM develops strained-silicon tech

Posted: 16 Dec 2005     Print Version  Bookmark and Share

Keywords:dual-stress liner  strained silicon technology  pfet  nfet  partnership 

ibm's recently developed dual-stress liner approach to strained-silicon technology came about through collaboration with its process development partners, said Paul Farrar Jr., process development manager at IBM Corp.'s semiconductor R&D centre.

When IBM was mulling over strained silicon, Farrar said, "we got the PFET approach, but we were thinking about how to do the NFET and one of our partners had an answer. We might have gotten it eventually without the partner, but in my gut, I believe we wouldn't have done so without the partner's ideas." IBM works on process development with AMD, Chartered, Infineon, Samsung, Sony and Toshiba.

In a remarkable admission, Farrar acknowledged that previous partnerships foundered because of arrogance on the part of IBM. "Ten years ago, if we had gotten paid by the amount of ego we had at IBM, we all would have been millionaires," Farrar said in a keynote speech at an International Sematech conference in October.

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