Global Sources
EE Times-India
Stay in touch with EE Times India
 
EE Times-India > Processors/DSPs
 
 
Processors/DSPs  

Test coverage enhancements at the register transfer level

Posted: 01 Jan 2001     Print Version  Bookmark and Share

Keywords:flash  microcontroller  mpc555  powerpc  ssaf 

This technology article describes the RTL buffer insertion and fault grading that helps identify untested functions and low-fault coverage areas where added test vectors can be generated.

View the PDF document for more information.



Comment on "Test coverage enhancements at the re..."
Comments:  
*  You can enter [0] more charecters.
*Verify code:
 
 
Webinars

Seminars

Visit Asia Webinars to learn about the latest in technology and get practical design tips.

 

Go to top             Connect on Facebook      Follow us on Twitter      Follow us on Orkut

 
Back to Top