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Soft USB controller design challenges

Posted: 28 Mar 2001     Print Version  Bookmark and Share

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Cypress Semiconductor Corporation 7 3901 North First Street 7 San Jose 7 CA 95134 7 408-943-2600 February 25, 2000 Soft USB Controller Design Challenges Implementing peripheral solutions for an emerging bus stan- dard such as USB is challenging. Peripheral developers must be responsive to external, co-developed variables. For USB, these variables include functionality with various host plat- forms (using different chip sets and BIOS), various releases of the host's operating system, and a continual evolution of peripheral device classes. A good way to accommodate USB development changes is to create USB controller chips that operate "soft", that is from code downloaded from the host computer into on-chip RAM, rather than using the traditional ROM approach. On the surface it seems an easy matter to download code over the USB and then execute the code to function as a USB peripheral device. However, the USB Specification allows a device to enumerate only once, so there is an inherent conflict between the device that downloads code and the resultant device that executes the custom application. This paper de- scribes the problem in detail and outlines the novel solution embodied in the EZ-USB chip family. The objective is a soft, single-chip USB peripheral solution. One side of the device receives and sends USB traffic, while the other side interfaces to the device's peripheral circuitry. Program code and data are stored in volatile RAM, which is downloaded from the host via the USB channel (Figure 1). When the chip powers on, there is no code in RAM and the CPU is held in reset. To understand the requirements of a "soft" architecture, it is helpful to review the anatomy of a USB peripheral device from the inside out. The special measures required to implement the soft feature are then apparent. The Basic USB Interface Inside every USB peripheral is a Serial Interface Engine (SIE) (Figure 2). The SIE: 7 Serializes and deserializes USB data. 7 Decodes the NRZI format used by USB. 7 Transfers bytes to and from the device. 7 Handles bit stuffing. 7 Checks the USB data for validity using CRC fields. 7 Handles bus signaling like reset, suspend, and resume. 7 Re-tries certain USB transfers if errors are encountered. The SIE is roughly analogous to the UART chip connected to a serial port. Serial data enters and leaves the SIE, and par- allel bytes are delivered to, and accepted from, the peripheral. However, USB is much more complex than a serial port. The following two examples illustrate some added complexity. What the SIE Does Figure 3 provides a simple example of what the SIE does. USB traffic is shown at the top of the illustration, with time traveling from left to right. This USB transaction represents a USB Bulk data transfer. A USB transaction consists of data packets identified by spe- cial codes called Packet IDs (PIDS). The bulk transfer uses four PID types: OUT, DATA0, DATA1, and ACK. The first packet is an OUT token, announcing that the host is about to send data to the peripheral. (USB direction is host- centric, OUT means host-to-device.) The second packet con- tains the DATA1 PID followed by a block of bytes labeled "Pay- load Data". The device indicates successful receipt of the data by sending the ACK PID in the third, handshake packet. The host then sends another OUT token, this time using the DATA0 PID, followed by more data and the device's ACK. The two data PIDS, DATA0 and DATA1, provide data security beyond CRC checking to guard against corrupted hand- shakes, and to maintain synchronism throughout long bulk transfers. Bulk data is transferred using alternating DATA0/1 PIDS. The host and peripheral maintain "data toggle" bits that are complemented when data is successfully sent and ac- 86% )XQFWLRQ 7UDIILF (QKDQFHG &RUH 9 0+] FORFN F\FOH 3URJUDP DQG 'DWD 5$0 ,2 Figure 1. The Objective: SOFT 6HULDO ,QWHUIDFH (QJLQH 6,( ' ' %\WHV 86% 7UDQVFHLYHU Figure 2. The Basic USB Interface Soft USB Controller Design Challenges 2 knowledged. If either side fails to read a correct handshake, it does not flip its data toggle, causing a mismatch with the next data PID. This initiates a retry. All of this is handled au- tomatically by the SIE. A USB Control Transfer Figure 4 illustrates a more complex USB operation: the SIE helps to process USB protocol information. The protocol layer responds to standard USB requests. The protocol layer can be implemented in logic or with the aid of a CPU. Figure 4 shows a USB transaction called a CONTROL transfer. CONTROL transfers consist of two or three stages, SETUP, STATUS, and an optional DATA stage. This example uses a DATA stage. The "Intelligence" block first decodes the host request using the eight Setup Data bytes from the SIE. In this example, the host has requested data from the peripheral (such as a "Get_Descriptor" request). The "Intelligence" block decodes the request from the eight SETUP bytes, retrieves the requested data from internal memory, constructs packets of the proper size, and sends them back through the SIE for USB transmission. After the data has been transferred, the "Intelligence" block commands the SIE to ACK the STATUS phase to conclude the CONTROL transfer. 6HULDO ,QWHUIDFH (QJLQH 6,( ' ' 86% 7UDQVFHLYHU 6 < 1 & 2 8 7 $ ' ' 5 ( 1 ' 3 & 5 & 7RNHQ 3DFNHW 6 < 1 & ' $ 7 $ 3D\ORDG 'DWD & 5 & 'DWD 3DFNHW 6 < 1 & $ & . 6 < 1 & 2 8 7 $ ' ' 5 ( 1 ' 3 & 5 & 7RNHQ 3DFNHW 6 < 1 & ' $ 7 $ 3D\ORDG 'DWD & 5 & 'DWD 3DFNHW 6 < 1 & $ & . +6 3NW 3D\ORDG 'DWD 3D\ORDG 'DWD $ & . Figure 3. Example 1, A USB Bulk Transfer 6 < 1 & , 1 $ ' ' 5 ( 1 ' 3 & 5 & 7RNHQ 3DFNHW 6 < 1 & ' $ 7 $ E\WHV 6HWXS 'DWD & 5 & 'DWD 3DFNHW 6 < 1 & +6 3NW 6 < 1 & 6 ( 7 8 3 $ ' ' 5 ( 1 ' 3 & 5 & 7RNHQ 3DFNHW 6 < 1 & ' $ 7 $ 3D\ORDG 'DWD & 5 & 'DWD 3DFNHW 6 < 1 & 6 < 1 & , 1 $ ' ' 5 ( 1 ' 3 & 5 & 7RNHQ 3DFNHW 6 < 1 & ' $ 7 $ 3D\ORDG 'DWD & 5 & 'DWD 3DFNHW 6 < 1 & +6 3NW 6(783 6WDJH '$7$ 6WDJH 67$786 6WDJH 6 < 1 & ' $ 7 $ 'DWD 3DFNHW 6 < 1 & +6 3NW 6 < 1 & 2 8 7 $ ' ' 5 ( 1 ' 3 & 5 & 7RNHQ 3DFNHW & 5 & +6 3NW 6HULDO ,QWHUIDFH (QJLQH 6,( E\WHV 6HWXS 'DWD 3D\ORDG 'DWD 3D\ORDG 'DWD LQWHOOLJHQFH $ & . $ & . $ & . $ & . $ & . Figure 4. Example 2, A USB CONTROL Transfer Soft USB Controller Design Challenges 3 When first attached to USB, a device answers a series of host requests through a process called "enumeration". During enumeration, the device tells the host about its capabilities and requirements. The CONTROL transfer shown in Figure 4 is typical of the USB traffic during enumeration. In a soft controller, the RAM, which holds the program code, powers on in an unknown state, so the on-chip CPU is not available to perform the "Intelligence" function described above. Therefore, the SIE must be enhanced to handle enu- meration without using the CPU. EZ-USB Enhanced SIE The intelligence to fully enumerate as a USB device can be incorporated into the SIE logic (Figure 5). This "Enhanced SIE" contains hard-coded descriptor tables to identify it as a "Generic" device. These descriptors instruct the operating system to load the correct driver to operate the device. The generic device contains default USB endpoints and alternate settings as shown in Table 1. Having a default set of endpoints simplifies the USB learning curve, since the developer can program and study USB trans- fers starting with a fully functional USB device. AN2131 Memory Map The default endpoints shown in Table 1 actually represent a subset of the 31 endpoints available in the AN2131. The full set of AN2131 endpoints is shown in Figure 6. 6HULDO ,QWHUIDFH (QJLQH 6,( LQWHOOLJHQFH (QKDQFHG 6,( )XOO 'HYLFH (QXPHUDWLRQ Figure 5. EZ-USB Enhanced SIE Table 1. Default Endpoints Endpoint Type Alternate Setting 0 1 2 Max Packet Size (bytes) 0 CTL 64 64 64 1 IN INT 0 16 64 2 IN BULK 0 64 64 2 OUT BULK 0 64 64 4 IN BULK 0 64 64 4 OUT BULK 0 64 64 6 IN BULK 0 64 64 6 OUT BULK 0 64 64 8 IN ISO 0 16 256 8 OUT ISO 0 16 256 9 IN ISO 0 16 16 9 OUT ISO 0 16 16 10 IN ISO 0 16 16 10 OUT ISO 0 16 16 (QGSRLQW ,1 (QGSRLQW 287 (QGSRLQW ,1 (QGSRLQW 287 (QGSRLQW ,1 (QGSRLQW 287 (QGSRLQW ,1 (QGSRLQW 287 (QGSRLQW ,1 (QGSRLQW 287 (QGSRLQW ,1 (QGSRLQW 287 (QGSRLQW ,1 (QGSRLQW 287 (QGSRLQW ,1 (QGSRLQW 287 (=86% UHJV . 5$0 E\WHV %XON (QGSRLQW %XIIHUV % )) %\WHV ,VRFKURQRXV ),)26 %\WHV ,VRFKURQRXV ),)26 $ &$ (QGSRLQW FRQWURO (QGSRLQWV EXONLQWHUUXSW (QGSRLQWV LVRFKURQRXV $OO 86% HQGSRLQWV DUH DYDLODEOH &$ Figure 6. AN2131 Memory Map Soft USB Controller Design Challenges 4 Advanced SIE Enumerates and Loads Code For the soft application, it's not enough just to enumerate. The Enhanced SIE must also download code into on-chip RAM for operation as the final USB device (Figure 7). The Enhanced SIE accomplishes this by decoding a vendor-specific request that downloads code into internal RAM. This request is han- dled over endpoint zero, the default control endpoint. The eight set-up bytes that define the "Download" USB request are shown below: Final USB Device Once the code is loaded and the CPU is brought out of reset, the final USB device is operational. Now the CPU is in charge. The CPU handles the USB device requests that were initially fielded by the enhanced SIE. Because the CPU has access to the added SIE intelligence, the firmware is simplified. In effect, the enhanced SIE becomes a high-level engine for USB requests (Figure 8). The ReNumerationTM Process There's a hitch. USB allows a device to enumerate only once. The three steps shown in Figure 9 accomplish the enumera- tion that configures the soft USB controller as a loader, capa- ble of downloading the final device personality into internal RAM. But once the RAM is loaded with the descriptors and code that define the final device, it's too late to connect to USB as the final device. The device needs to enumerate a second time, or ReNumer- ateTM (Figure 10). When the final device driver loads, the de- vice contains all firmware and descriptors, and our soft con- troller is in business. Byte Field Value Meaning 0 bmRequest 0x40 Vendor Request, OUT 1 bRequest 0xA0 "Load" 2 wValueL AddrL Starting address 3 wValueH AddrH 4 wIndexL 0x00 5 wIndexH 0x00 6 wLengthL LenL Number of Bytes 7 wLengthH LenH 6HULDO ,QWHUIDFH (QJLQH 6,( LQWHOOLJHQFH $QFKRU &KLSV (QKDQFHG 6,()XOO 'HYLFH (QXPHUDWLRQ (QKDQFHG &RUH 9 0+] FORFN F\FOH 3URJUDP DQG 'DWD 5$0 'RZQORDG 8SORDG &RGH Figure 7. Advanced SIE Enumerates and Loads Code Figure 8. Final USB Device LQWHOOLJHQFH LQWHOOLJHQFH $QFKRU &KLSV (QKDQFHG 6,( 86% )XQFWLRQ 7UDIILF (QKDQFHG &RUH 9 0+] FORFN F\FOH 3URJUDP DQG 'DWD 5$0 6HULDO ,QWHUIDFH (QJLQH 6,( LQWHOOLJHQFH $QFKRU &KLSV (QKDQFHG 6,( ,2 Soft USB Controller Design Challenges 5 The "magic" is simple (Figure 11). A USB hub detects a high- speed device by the presence of a 1500 pull-up resistor connected to the D+ line. (The hub has a 15-k pull-down to keep the line low when nothing is connected.) Under control of a CPU register bit, the DISCON# pin either drives to the 3.3 V rail or floats, . This emulates a physical disconnect and reconnect while maintaining power to the de- vice. Once reconnected, the USB device enumerates using the downloaded code and descriptors. The entire enumerate- ReNumerateTM process happens in less than a second. +RVW 3& UHFRJQL]HV GHYLFH DWWDFKPHQW VWDUWV (QXPHUDWLRQ SURFHVV +RVW 3& ORDGV ORDGHU GULYHU ZKLFK ORDGV ILUPZDUH DQG GHVFULSWRUV LQWR GHYLFH IURP D VRIWZDUH ILOH (=86% 470 SURYLGHV GHYLFH GHVFULSWRUV WR LGHQWLI\ WKH ORDGHU GULYHU +RVW 3& @ ([WHUQDO ),)2 RU $6,& $FFXPXODWRU '375 ,62 ,1 ),)2 '>@ PRY[#GSWUD )5' ([WHUQDO ),)2 RU $6,& Figure 15. AN2131 Fast Transfer Modes Soft USB Controller Design Challenges ) Cypress Semiconductor Corporation, 2000. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress Semiconductor product. Nor does it convey or imply any license under patent or other rights. Cypress Semiconductor does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges. Figure 16. Fast Transfer to an External FIFO " 3257$ 3257& 3257% 'DWD 5' :5 , & UHJ287 3LQ 3,1 2( $OWHUQDWH )XQFWLRQ $GGUHVV Figure 17. Expanding the AN2131




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