Please contact:

Ravi Chander. N
Manager, Marketing &  Communications

Position: DFT Engineer :

Qualification: B.Tech/B.E (ECE/EE)/M.S/M.Tech (VLSI/Digital Electronics)

Experience: 4-9 yrs

Location: Hyderabad

Job Description: Ideal Candidate will be part of the DFT team, providing DFT services to a wide range of silicon companies. He/She will work on all aspects of DFT(Logic bist, Memory BIST, , Boundary Scan, High speed interface BIST, Full Scan, Scan compression, ATPG and ATE Support)

 Required Skills:

· Strong hands on Experience using Standard EDA Tools like Logic Vision, Mentor and Synopsys.

·  Strong understanding & hands on experience with industry standard DFT techniques such as boundary scan, Memory BIST, BISA and BIRA, Scan/ Compression/ ATPG/ At-speed Fault simulation and Logic BIST and BIST for high speed serial links.

· Post Silicon Validation, ATE Debug and Support are needed.

· Very good understanding of the complete Logic design, Modeling, RTL-Implementation & Verification, Logic Synthesis, Logic Equivalent Checking, Static Timing Analysis, Signal Integrity checks, & Backend timing closure.


Position: Physical Design Engineer

Qualification: B.Tech/B.E (ECE/EE)/M.S/M.Tech (VLSI/Digital Electronics)

Experience: 4-7 yrs

Location: Hyderabad

Job Description:

Ideal candidate would work on ASIC Physical Design from Net list to GDS2

Required Skills:

·         Should Have Hands on Experience in using Physical design tools & methodology with experience in Low Power techniques Clocking and synthesis

·         Knowledge on SoC Encounter is a Plus.

·         Should have demonstrated technical expertise in successful completion of multiple projects.

·         Good understanding and knowledge on all aspects of Backend ASIC design flow (Synthesis/DFT/Floor Planning/STA/Layout/Place & Route/Cross talk & Power Analysis/Physical Verification).

·         Knowledge on LVS, DRC is desired - Excellent written/verbal communication skills with ability to work well in a team environment.


Position: Wireless System Engineer

Qualification:  MS/PHD in EEE or Equivalent

Experience: 5-15yrs

Location: Bangalore


Job Description:


•Ideal Candidate will contribute to development of system architecture for high performance , standard compliant WLAN transceiver.


•He/she will be responsible for Design, simulation, and testing PHY baseband algorithms in MATLAB.


•He/She will be part of team that Implements fixed-point baseband transmitter/receiver in MATLAB/C and work with ASIC group on block and system level verification


Required Skills:


• MS/PhD in EEE or equivalent


• Minimum 5 years of relevant work experience


• Experience with product development of industry standard compliant wireless transceivers


• Proficient in MATLAB and C


• Familiarity with 802.11 a/b/g/n PHY standards or OFDM PHYs is a plus