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Verification suite boasts multicore-friendly code coverage

Posted: 05 May 2015     Print Version  Bookmark and Share

Keywords:Rapita Systems  verification suite  code coverage  avionics  automotive software 

RVS enhancements for multicore code coverage

According to Andrew Coombes, who heads marketing and engineering services at Rapita Systems Ltd (York, U.K.), the latest version of the company's verification suite incorporates features that allow the developer to highlight which sections of code were exercised on each core in the system, and indicate when sections of code were seen to execute on multiple cores. This information can be used to ensure that the effects of core migration are fully explored during testing.

To deal with synchronisation, the recent version of RVS is able to gather information on the coverage of synchronisation and mutual exclusion mechanisms within most multicore applications. In particular, said Coombes, evidence can be generated to show that critical sections have been entered by all the possible routes in the source code.

RVS

RVS allows analysis graphically and line-by-line of multicore code.

RVS can also show what proportion of the different combinations in which a barrier can be reached have been encountered during testing. This information can be used in conjunction with timing measurements to estimate the worst-case waiting time.

Several enhancements to RVS 3.3's RapidCover structural code tracker and RapiTime timing analysis tools make this possible, he said. The structural code tracker tests and collects execution traces in the environment for which the application was written and from this provides code coverage metrics that helps identify which sections of code are either untested or covered by unnecessary test cases. "Using the traces makes it possible to step through the code forwards and backwards. If a trace also records the specific time at which instrumentation points are executed, it is possible to determine timing information," said Coombes.

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