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Qualcomm underscores need for monolithic 3D ICs

Posted: 19 Jun 2014     Print Version  Bookmark and Share

Keywords:Qualcomm  monolithic 3D IC  Moore's Law  EDA  interconnect 

Back to the DAC 2014 keynote, Arabi explained: "Mobile is becoming a centre of gravity for the user. It is providing a unique opportunity" but it becomes a challenge to develop, because you have to integrate them at lower power and low cost as well. One of the biggest problems is cost. We are very cost sensitive. Moore's Law has been great. Now, although we are still scaling down, it's not cost-economic anymore. It's creating a big problem for us." As I reported in my recent column, 28nm: The Last Node of Moore's Law, dimensional scaling below 28nm will result in increasing device cost. This was echoed multiple times at this DAC by other keynote speakers such as Hossein Yassaie, CEO of Imagination Technologies, who said: "Moore's Law is really over from my point of view. It's not that it can't scale, it's that the cost is not going down anymore."

Shrinking chips: number and length of transistors bought per $ (forecast)

Shrinking chips: number and length of transistors bought per $ (forecast). (Source: Linley Group)

Cost is not the only problem with dimensional scaling. The following IBM slide illustrates that interconnect now dominates device power:

Communication dominates power

Communication dominates power.

The interconnect's effect on power is getting worse with dimensional scaling. In his DAC keynote, Arabi also stated: "Interconnect RC is inching up as we go to deeper technology. That is a major problem because designs are becoming interconnect-dominated. Something has to be done about interconnect. What needs to be done is monolithic 3D ICs. So we are looking at true monolithic 3D. You have normal vias between different stacks. Then interconnect lengths will be smaller than with 2D. If we can connect between layers the delay becomes smaller. This is a technology for the end of the decade, but it can give us an advantage of one process node, with a 30 per cent power saving and a 40 per cent gain in performance."

Clearly, monolithic 3D integration has a very important role for the future of the semiconductor industry. It is therefore fitting that the traditional IEEE conference on SOI has extended its scope and now calls itself S3S: SOI technology, 3D Integration and Subthreshold Microelectronics.

- Zvi Or-Bach
  EE Times


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