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A look into field-programmable RF chip

Posted: 02 May 2014     Print Version  Bookmark and Share

Keywords:programmable device  field-programmable radio frequency  FPRF  FPGA  PLL synthesiser 

The field-programmable radio frequency (FPRF) chip is a different type of programmable device. Before we start discussing it, let's have a quick look at the traditional field-programmable gate array (FPGA) concept.

As we know, FPGAs evolved from simple glue logic consolidation to being capable of implementing complex digital functions. Along the way, they have included a growing range of hard logic cores and functions such as processors and dedicated interface blocks. Some FPGAs also feature sophisticated analogue functions such as high speed transceivers, but—generally speaking—FPGAs have really only touched the fringes of the analogue world.

In contrast, the FPRF comes from the wireless domain and brings exciting new possibilities. At the highest level of abstraction, the FPRF transmitter takes a digital data stream and converts it into wireless signals, while the receiver perform the inverse operation. Add to this the capability to program key parameters like the RF frequency, gain, and bandwidth, and you have the essential ingredients of an FPRF chip as illustrated in figure 1.

Figure 1: The essential ingredients of an FPRF chip.

When I first learned about the device, I could see that it brings similar capabilities for RF to those offered by FPGAs in the logic domain. Firstly, it is programmed by customers, not in the factory. Secondly, the tools allow customers to experiment and change parameters on the fly. Thirdly—and most importantly—the applications are limited only by the imagination of the user.

The FPRF chip is fabricated in the US for a UK company called Lime Microsystems. The part number is LMS6002D, but Lime coined the acronym FPRF because it captures the essense of the product.

So let's take a deeper dive into the product. Wireless transmission uses a range of different modulation schemes, and the chip accepts data as In-phase (I Data) and Quadrature (Q Data) words. The transmit path applies the data to a pair of on-chip DACs to convert it into two analogue signals. The user can choose to bypass the DACs and inject analogue signals directly into the device or monitor the DAC outputs.

The next operation involves filtering the signal. The pass band of this filter is programmed by the user to one of 16 different bandwidths ranging from 1.5 to 28MHz. The filtering restricts the signals to the selected bandwidth, and attenuates any out-of-band noise or aliasing from the DAC. The block diagram for the transmit (TX) path is illustrated in figure 2.

Figure 2: The block diagram for the transmit (TX) path.


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