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<40nm processes grab one-fourth of world's IC wafer capacity

Posted: 09 Apr 2013     Print Version  Bookmark and Share

Keywords:wafer capacity  40nm process  IC production 

At the end of 2012, about 27 per cent of global wafer capacity was for devices having geometries smaller than 40nm, according to IC Insights' "Global Wafer Capacity 2013—A Detailed Analysis and Forecast of the IC Industry's Wafer Fab Capacity" report. The report also shows that a surprising amount of capacity remains dedicated to mature processes with "large" features sizes, the market research firm noted.

Installed capacity is divided into six categories based on the minimum geometry of the processes used in wafer fabrication. The six categories range from <40nm; ≥40—<60nm; ≥60nm—<80nm; ≥80nm—<0.2µ; ≥0.2µ—<0.4µ; ≥0.4µ.

The smaller than 40nm ICs are dedicated to produce devices such as high-density DRAM, which are typically built using 30nm- to 20nm-class process technologies; high-density flash memory devices that are based on 20nm- to 10nm-class processes; and high-performance microprocessors and advanced ASIC/ASSP/FPGA devices based on 32/28nm or 22nm technologies.

Worldwide capacity

Figure 1: Worldwide capacity by minimum geometry as of December 2012 (installed monthly capacity in 200mm-equiv. wafers x1000)
Source: IC Insights

About 22 per cent of global capacity is dedicated to the ≥80nm—<0.2µ segment, which includes the 90nm, 0.13µ, and 0.18µ process generations. This "mature" process is widely used by pure-play foundries including TSMC, UMC, GlobalFoundries, SMIC, and TowerJazz and to manufacture a broad range of products for their diverse customer bases.

The least common technologies, at least in terms of the share of total installed capacity, are between the geometries of 80nm and 60nm (essentially the 65nm generation) and between 0.4µ and 0.2µ (essentially the 0.25µ and 0.35µ generations). However, it is worth noting that the >0.4µ category maintains a fairly large share of total capacity, even though it has been longer than a decade-and-a-half since 0.5µ process technology was considered leading-edge. The main reason is that huge quantities of commodity type devices such as standard analogue and general-purpose logic are manufactured with well-established process technologies having larger than 0.4µ feature sizes. In addition, high-voltage IC products require large-geometry process technologies.

The figure below shows the leading suppliers of installed wafer capacity based on minimum geometry. It is not surprising that Samsung, Intel, Toshiba/SanDisk, SK Hynix, and Micron top the list with the greatest amount of leading-edge capacity. The biggest capacity holders in the large-feature process category (>0.2µ) consist of several analogue and mixed-signal chip suppliers.

Capacity leaders ranking

Figure 2: Installed capacity leaders per min. geometry as of December 2012 (ranked by shares of total WW installed monthly 200mm-equiv. capacity)
Source: IC Insights





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