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Understand serial LVDS high-speed ADC interface

Posted: 04 Jan 2013     Print Version  Bookmark and Share

Keywords:SelectIO  FPGAs  analog-to-digital converters 

This application note tackles a method of utilizing dedicated SelectIO technology deserializer components (ISERDESE2 primitives) in 7 series FPGAs to interface with analog-to-digital converters (ADCs) with serial, low-voltage, differential signalling (LVDS) outputs.

The associated reference design illustrates a basic LVDS interface connecting a Kintex-7 FPGA to an ADC with high-speed, serial LVDS outputs.

View the PDF document for more information.

Originally published by Xilinx Inc. at www.xilinx.com as "Serial LVDS High-Speed ADC Interface".





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