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Android HW-SW devt with virtual prototype (Part 1)

Posted: 30 Nov 2012     Print Version  Bookmark and Share

Keywords:Android  Software Development Kit  Virtual prototyping 

In contrast to the IP supplier use case, a generic prototyping system that can be extended by individual IP titles is not sufficient. For the IP supplier use case, large capacity FPGA prototyping systems are leveraged, such as the Synopsys HAPS Family of FPGA-Based Prototyping Solutions�[5]. But again, software development cannot wait until RTL is available and therefore a pre-RTL prototyping solution is necessary.

Virtual prototyping and virtualizer dev't kits
Virtual prototyping is a method of prototyping a hardware system before RTL becomes available. Instead of mapping hardware on an FPGA, a virtual prototype simulates the hardware system on a host PC and runs the final binary software images of the entire software stack including ROM code, operating system, and higher level software platforms such as Android. In contrast to the SDK for Android, a virtual prototype mimics the hardware at the lowest level observable by the software: the CPU instruction set, platform memory map, and interrupts.

Still, the simulation speed of a virtual prototype is well within acceptable ranges for the software developer and scales between two to fifty times slower than real time. This depends mainly on the complexity and scope of the hardware modelled. Another advantage of virtual prototypes, next to their earlier availability, is rooted in the outstanding determinism, control, and visibility that enable powerful debug and test techniques, which will be examined later in this article.

Figure 1: Virtual prototype example.

A virtual prototype is constructed using abstract functional models of the hardware components such as the CPUs and peripherals. The Synopsys Virtualizer [6] technology provides an environment that is based on the IEEE 1666 SystemC TLM-2.0 model interoperability industry standard. Using dedicated authoring tools, a virtual prototype can be constructed with custom TLM-2.0 models or by leveraging a large library of commodity models (such as ARM CortexA,R,M series including big.LITTLE, ARM PrimeCell, Synopsys DesignWare, etc.). Models from multiple vendors are also provided through internet platforms such as TLMCentral.com. Model authoring tools for custom hardware also exist, such as the Synopsys TLMCreator. TLMCreator greatly facilitates the creation of custom TLM-2.0 compliant models.

Virtual prototyping has become an established software development enabler for major semiconductors as announced by Texas Instruments [7] in the context of the OMAP ecosystem. An illustration of a virtual prototype, the embedded software and the tool ecosystem is shown in figure 1.

Some virtual prototypes may abstract some functions of certain peripherals away if they are not relevant to the scope of the software development. The ability to abstract away dedicated functions is an advantage of virtual prototypes. It enables control over the complexity of software development and allows for an optimally staged software development plan. On the other hand, physical hardware requires bringing up complex boot ROM code before the OS porting can even start. A virtual prototype allows for greater flexibility here, where functions of the boot code, such as loading kernel images into flash memory, are an implicit part of the virtual prototype tool capabilities. Now, boot ROM code development and OS bring-up can be performed independently from each other, even in parallel or reversed order.

Advantages of virtual prototyping
An advantage of using virtual prototypes for software development is that the software developer can use the same embedded software build and debug tools as can be used with hardware. The debug server, which is an implicit part of the generic infrastructure, provides instant "stop-mode" connectivity to 3rd party debug tools. The Virtualizer debug server supports the most prominent debug tools, such as ARM's DS-5/RVDS, Lauterbach's Trace32, GNU's gdb, etc.

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