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Significance of bridge architecture in tablets

Posted: 18 Oct 2012     Print Version  Bookmark and Share

Keywords:West Bridge  USB  storage  NAND 

Rather than the processor having to monitor the various connectivity interfaces, the West Bridge can assume this function and only wake up the main SoC when required. This becomes critical in extending battery life as much lower power consumption can be achieved with a single SoC managing all the interconnects compared to a full processor system.

Longer life-cycles of designs
A West Bridge can also help in the battle against rising ECC bit requirements in supporting raw-MLC/TLC NAND flash. Rather than having to change the processor itself, the bridge alone could be updated every 6-8 months to keep up with the latest ECC trends. In this way, the life cycle of particular design architecture can be significantly increased.

What to look for in a bridge?
In terms of the user experience and power efficiency, bridge architecture is a must for better user experience in tablet devices. Here is a list of features that system designers should look for when specifying a West Bridge for tablets.

 • USB port
Support for USB 2.0 OTG. This way, the tablet device can sync with a primary PC/Laptop and also have the ability to support portable storage devices like USB thumb drives.
 • Support for USB 3.0 (in the near future). This is the age of Sync-n-Go. Users want to be able to change the content on their devices as instantaneously as possible.

Processor port
A flexible processor interface is a must for bridges. Every tablet design is different, and such flexibility gives system designers the freedom to develop various possible architectures to give better system level performance.

 • SRAM interface: To look like an attached memory to the processor. This would be the fastest connectivity interface between the SoC and the bridge if the speed is required
 • NAND interface: To look like a NAND device that is attached to the processor.
 • SDIO interface: This allows the bridge to be directly plugged into one of the SDIO ports available on a typical tablet SoC.

 • Storage port
Two or more ports: To support at least one internal memory and one removable memory
 • Raw MLC / TLC NAND support: An ideal bridge should be able to support raw MLC NAND (2 bits per cell) and raw TLC NAND (3 bits per cell). These are the same storage components that lie underneath an SD Card or SSD drive. When the high performance bridge directly supports these NANDs in the rawest form, this eliminates $1-$2 in BOM cost. The bridge should be able to support up to 48bits of ECC for the design to be relevant over the next 2 years
 • SD / MMC support: Support for the standard removable storage media
 • SDIO expansion support: SD card support can further be extended to SDIO to support the addition of Wi-Fi, GPS, GPRS, Digital TV demodulators (to support watching Live TV), etc. This allows for peripheral expansion as well as further processor off-loading
 • SPI Master: to enable the bridge to control devices like wireless keyboard radios, etc.
 • GPIOs: to give flexibility to support the custom needs of an application

Other features
Other than just the various interfaces mentioned above, a good Bridge should be able to support:

 • Independent simultaneous data-paths: This allows the Processor, storage, and USB ports to talk to each other without any bottlenecks or other constraints
 • Media Transfer Protocol (MTP): Many devices have moved away from just Mass Storage Class for enumeration when connected to a PC
 • Booting from raw-NAND: The Bridge can reduce BOM cost significantly if it allows consolidation of the Boot NAND into the Mass Storage raw-NAND
 • Multiple enumeration support: This allows the tablet to appear as a Mass Storage Class, webcam, 3G modem, or even a 2nd display unit when connected to a PC/Laptop. This way, the various features on the tablet can be individually taken advantage of while docked into another PC/Laptop

The user experience for tablet devices can be significantly improved by moving to an internal West Bridge architecture that bypasses the many bottlenecks of traditional architectures. By facilitating faster data throughput, developers can improve data transfer speeds while significantly reducing power consumption.

About the author
Manu Karan has an MS in Computer Engineering from North Carolina State University and an MBA from the Indian School of Business. He is currently working as an Associate Manager Sr., USB Product Marketing, at Cypress.

To download the PDF version of this article, click here.


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