Dow Corning, SUSS collaborate on TSV chip packaging
As part of this non-exclusive agreement, the companies are developing a material and equipment system solution for high volume manufacturing of 3D TSV packaged devices.
Stacking two or more chips vertically using TSV technology is one of the viable ways to reduce the footprint on the printed circuit board (PCB), though requires the industry to find a solution for handling thin wafers, using temporary bonding.
Comprised of both an adhesive and release layer, the Dow Corning silicon-based material is optimised for simple processing with a bi-layer spin coating and bonding process. Combined with SUSS MicroTec equipment, the total solution offers the benefits of simple bonding using standard manufacturing methods and provides compatibility with thermal and chemical requirements for via middle and interposer TSV processing, as well as faster room temperature de-bonding required for advanced packaging applications.
"SUSS MicroTec is a recognised leader in wafer bonding and applications for 3D TSV, WLP, and microelectromechanical systems (MEMS) markets. Leveraging their equipment expertise allows Dow Corning to provide customers with access to system solutions for their complex 3D packaging requirements," commented Jim Helwick, vice president, Dow Corning Electronics Solutions.
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