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GlobalFoundries announces 3D chip stacking at 20nm

Posted: 30 Apr 2012     Print Version  Bookmark and Share

Keywords:3D chip  20nm  semiconductor wafers 

GlobalFoundries has begun installation of a special set of production tools to create Through-Silicon Vias (TSVs) in semiconductor wafers processed on the company's 20nm technology platform at Fab 8.

According to GlobalFoundries, the TSV capabilities will allow customers to stack multiple chips on top of each other. TSVs, vertical holes etched in silicon and filled with copper, could allow circuit designers to place stacks of memory chips on top of an application processor, which can dramatically increase memory bandwidth and reduce power consumption.

Gregg Bartlett, chief technology officer, GlobalFoundries, said, "Our approach is broad and collaborative, giving customers maximum choice and flexibility, while delivering cost savings, faster time-to-volume, and a reduction in the technical risk associated with developing new technologies. With the installation of TSV capabilities for 20nm technology in Fab 8, we are adding an important capability that will be supplemented by our joint development and manufacturing partnerships with companies across the semiconductor ecosystem, from design to assembly and test."

The first full-flow silicon with TSVs is expected to start running at Fab 8 in Q3 2012, the company added.





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