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ARM unveils Cortex-A15 hard macro

Posted: 20 Apr 2012     Print Version  Bookmark and Share

Keywords:hard macro  Cortex-A15  quad core 

ARM unveils a high performance, power-optimised quad-core hard macro implementation of its Cortex-A15 MPCore processor that is designed to run at 2GHz.

The ARM Cortex-A15 MP4 hard macro is said to deliver performance in excess of 20,000DMIPS, while maintaining the power efficiency of the Cortex-A9 hard macro. The Cortex-A15 hard macro development is the result of the synergy arising from the combination of ARM Cortex processor IP, Artisan physical IP, CoreLink systems IP and ARM integration capabilities, and utilises the TSMC 28HPM process.

The low leakage implementation, featuring integrated NEON SIMD technology and floating point (VFP), delivers an extremely competitive balance of performance and power and is targeted at wide array of high-performance computing applications such as notebooks through to power-efficient, extreme performance-orientated network and enterprise devices, according to the company.

The hard macro was developed using ARM Artisan 12-track libraries and the recently announced Processor Optimisation Pack (POP) solution for the Cortex-A15 on TSMC 28nm HPM process.

"For SoC designers looking to make a trade-off between the flexibility offered by the traditional RTL-based SoC development strategy and a rapid time to market, with ensured, benchmarked power, performance and area, an ARM hard macro implementation is an ideal, cost-effective solution," said Jim Nicholas, vice president of Marketing, processor division, ARM.





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