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Cadence gains clock optimisation tech with Azuro buy

Posted: 14 Jul 2011     Print Version  Bookmark and Share

Keywords:tool design  economy  SoC 

Cadence Design Systems Inc. buys Azuro Inc., a company that offers unique clock concurrent optimisation technology, also known as ccopt, which is said to address increasing performance, power and area challenges in the digital implementation and optimisation of next-generation SoCs.

Specifically, ccopt technology has delivered significant quality of silicon (QoS) on high-speed processor designs in the following areas:

1. Power (clock tree power reduction up to 30 per cent and total power improvements of up to 10 per cent),

2. Performance (improvements of up to 100MHz for a GHz design), and

3. Area (clock tree area reduction up to 30 per cent)

The acquisition was completed July 11, 2011, and is not expected to have a material effect on the Cadence's results of operation for fiscal 2011. Terms of the acquisition were not disclosed. All key management, technical and key field applications personnel will transition to Cadence.

The Azuro ccopt technology is experiencing rapid adoption by designers implementing high-speed embedded processors and complex SoCs. The technology uniquely integrates and merges core steps in the flow including timing-driven placement, useful-skew clock tree synthesis, incremental physical optimisation, physical clock gating, and post-clock tree optimisation.

"Traditional digital implementation flows are reaching their limits in their ability to meet the power, performance and area requirements of today's SoC designs," says Chi-Ping Hsu, senior vice president, research and development of Silicon Realisation Group at Cadence.

He adds that, "Azuro has invented a truly disruptive technology that goes far beyond traditional, multi-step and iterative digital implementation flows and provides significant advantages for both today's complex silicon and SoC designs, as well as advanced-node, next-generation SoCs. We welcome this team to Cadence, and its innovative technology to our award-winning Encounter Digital Implementation flow."

Today's acquisition, along with the recent acquisition of Altos, underscores the Cadence commitment to invest in and deliver the technologies that are needed to help customers realise next-generation SoC designs. The clock network is the heartbeat of any high-speed and/or low-power design and becomes critical to achieving power, performance and area targets for SoCs. In today's designs, there are often well over a hundred interlinked clock signals that can be branched and merged thousands of times, requiring a new design paradigm for digital implementation and optimisation.

"Realising the growing challenges of increasingly complex SoCs, Azuro pioneered a fundamentally new approach to digital implementation that took into account the critical role of clocks in achieving power, performance, and area specs," said Paul Cunningham, co-founder and CEO of Azuro.

He claims that, "Cadence has been aggressively advancing its digital implementation solution and shares our view of the innovation that is required to continue to help customers realise the next generation of design. We look forward to joining the Cadence team to bring a new generation of digital implementation to the industry."

The increasing challenges of SoC design were outlined in the Cadence vision for the industry, called EDA360.

Cadence will offer the Azuro ccopt technology immediately as an upgrade add-on for Cadence EDI customers.





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