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Uncovering the mysterious A5

Posted: 02 May 2011     Print Version  Bookmark and Share

Keywords:A5  ipad 2  A4  iOS 

Back to the A5
There are likely at least two ways of considering the term "further differentiate." First, we know Apple is licensing IP cores for its SoCs. This is not a surprise. At the heart of the A5 are a licensed CPU and GPU. To differentiate themselves Apple has likely included blocks that add additional horsepower for video, in particular. Whether the A5 employs the above referenced hardwired video accelerator or a NEON SIMD extension as was more recently suggested in a comment to another article is unknown. It is not the role of this article to identify and/or confirm any of the blocks on the A5.

Designing both a video accelerator and a SIMD extension block into the A5 would be logical. It makes sense. Ultimately the combination of all the licensed IP cores may add up to a differentiating design.

Second, Apple has a successful line of iOS devices with the competition working hard to hold onto their market share. But Apple has an ace in the hole—integration. Apple now controls the whole stack for the iOS devices. Yes, there are third party components, but the design of everything "thinking" is Apple's. Is this something that can be leveraged and would it provide a competitive advantage?

If there was some functionality or application that required a single operation or group of operations it would be more efficient to design a very specific integrated circuit that could perform this task than to run code on a general purpose processor. As long as the task never changes, it can be performed more efficiently as a hardwired design. Of course what you lose in the flexibility of a software implementation, you could make up in speed and lower power consumption with the hardwired version.

The A5 is a second generation chip whose design evolved—or should have—with intimate knowledge of the software stack that will run on it. Designers were aware of what elements of this software would remain constant over time. Would it be possible to remove selected functionality or routines from software and implement them as hardwired circuits on the A5, going beyond selected IP blocks and designing circuits specific to the software? There is certainly considerable real estate available.

This question was posed to a circuit designer. He commented there are a number of trade-offs in the design of custom hardware. Hardwired blocks can perform fixed functions on data very efficiently providing for lower CPU requirements for equivalent performance. In terms of video, this might include DMA's and image scalars to name but two. There might also be microcode support. For video processing this could be an instruction performing a "sum of absolute differences." Finally, video processing is memory intensive. The addition of a shared cache memory block to hold data could be used to decrease off-chip memory access latency.

While it is not implied that these specific examples are on the A5, they are meant to illustrate that this type of customisation in CPU-based integrated circuits is not only possible; it's being done. The caveat in all of this is that it consumes silicon. Silicon that is wasted if the circuit is not used by the software. It all hinges on knowing the structure of the software and its roadmap. With that type of insider knowledge, a designer can hammer that functionality down to the bare metal.�


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